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Luxferre
2026-06-29 23:03:30 +03:00
parent 742f98f276
commit 54bcbfa28d
+1 -1
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@@ -12,7 +12,7 @@ The emulator models a simplified 12-bit DEC PDP-8/L processor. CPU registers and
* **`pc` (Program Counter)**: 12-bit register holding the address offset of the next instruction. * **`pc` (Program Counter)**: 12-bit register holding the address offset of the next instruction.
* **`ac` (Accumulator)**: 12-bit register used for arithmetic, logic, and I/O. * **`ac` (Accumulator)**: 12-bit register used for arithmetic, logic, and I/O.
* **`link` (Link Register)**: 1-bit register functioning as a carry/overflow indicator, logically positioned to the left of the Accumulator for shifts. * **`link` (Link Register)**: 1-bit register functioning as a carry/overflow indicator, logically positioned to the left of the Accumulator for shifts.
* **sr` (Switch Register)**: 12-bit register representing front panel switches, queried via operate instructions. * **`sr` (Switch Register)**: 12-bit register representing front panel switches, queried via operate instructions.
* **Program Interrupt Registers**: * **Program Interrupt Registers**:
* `ie` (Interrupt Enable Flag): 1-bit register controlling the interrupt system. * `ie` (Interrupt Enable Flag): 1-bit register controlling the interrupt system.
* `ion_delay` (Interrupt On Delay): Counter managing the 1-instruction latency for enabling interrupts. * `ion_delay` (Interrupt On Delay): Counter managing the 1-instruction latency for enabling interrupts.