luxferre/a-machine
1
0
Fork 0
Code Actions Activity

some amach_comp optimizations

Browse Source
This commit is contained in:
Luxferre
2026-06-18 19:16:21 +03:00
parent 3391969951
commit 1bb6272115
1 changed files with 12 additions and 12 deletions
Download Patch File Download Diff File Expand all files Collapse all files
amach.awk
+12 -12
View File
@@ -281,24 +281,24 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
f3 = int(instr / 8192) % 8 f3 = int(instr / 8192) % 8
b12 = int(instr / 4096) % 2 b12 = int(instr / 4096) % 2
r11_7 = int(instr / 128) % 32 r11_7 = int(instr / 128) % 32
r9_7 = (int(instr / 128) % 8) + 8 r9_7 = (r11_7 % 8) + 8
r6_2 = int(instr / 4) % 32 r6_2 = int(instr / 4) % 32
r4_2 = (int(instr / 4) % 8) + 8 r4_2 = (r6_2 % 8) + 8
shamt = r6_2 + b12 * 32 shamt = r6_2 + b12 * 32
if (op == 0) { if (op == 0) {
if (f3 == 0) { # C.ADDI4SPN if (f3 == 0) { # C.ADDI4SPN
imm = (int(instr / 128) % 16) * 64 + (int(instr / 2048) % 4) * 16 + (int(instr / 32) % 2) * 8 + (int(instr / 64) % 2) * 4 imm = (r11_7 % 16) * 64 + (int(r11_7 / 16) + b12 * 2) * 16 + (int(r6_2 / 8) % 2) * 8 + (int(r6_2 / 16) % 2) * 4
if (imm == 0) trapout(sprintf("Illegal instruction C.ADDI4SPN at 0x%X", pc-2)) if (imm == 0) trapout(sprintf("Illegal instruction C.ADDI4SPN at 0x%X", pc-2))
setreg(r4_2, getreg(2) + imm) setreg(r4_2, getreg(2) + imm)
} else if (f3 == 2) { # C.LW } else if (f3 == 2) { # C.LW
imm = (int(instr / 32) % 2) * 64 + (int(instr / 1024) % 8) * 8 + (int(instr / 64) % 2) * 4 imm = (int(r6_2 / 8) % 2) * 64 + (int(r11_7 / 8) % 4) * 8 + b12 * 32 + (int(r6_2 / 16) % 2) * 4
base = (getreg(r9_7) + imm) % 4294967296 base = (getreg(r9_7) + imm) % 4294967296
if (base < 0) base += 4294967296 if (base < 0) base += 4294967296
val = MEM[base] + MEM[(base+1)%4294967296]*256 + MEM[(base+2)%4294967296]*65536 + MEM[(base+3)%4294967296]*16777216 val = MEM[base] + MEM[(base+1)%4294967296]*256 + MEM[(base+2)%4294967296]*65536 + MEM[(base+3)%4294967296]*16777216
setreg(r4_2, val) setreg(r4_2, val)
} else if (f3 == 6) { # C.SW } else if (f3 == 6) { # C.SW
imm = (int(instr / 32) % 2) * 64 + (int(instr / 1024) % 8) * 8 + (int(instr / 64) % 2) * 4 imm = (int(r6_2 / 8) % 2) * 64 + (int(r11_7 / 8) % 4) * 8 + b12 * 32 + (int(r6_2 / 16) % 2) * 4
base = (getreg(r9_7) + imm) % 4294967296 base = (getreg(r9_7) + imm) % 4294967296
if (base < 0) base += 4294967296 if (base < 0) base += 4294967296
val = getreg(r4_2) val = getreg(r4_2)
@@ -314,7 +314,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
if (imm >= 32) imm -= 64 if (imm >= 32) imm -= 64
setreg(r11_7, getreg(r11_7) + imm) setreg(r11_7, getreg(r11_7) + imm)
} else if (f3 == 1 || f3 == 5) { # C.JAL / C.J } else if (f3 == 1 || f3 == 5) { # C.JAL / C.J
imm = b12 * 2048 + (int(instr / 256) % 2) * 1024 + (int(instr / 512) % 4) * 256 + (int(instr / 64) % 2) * 128 + (int(instr / 128) % 2) * 64 + (int(instr / 4) % 2) * 32 + (int(instr / 2048) % 2) * 16 + (int(instr / 8) % 8) * 2 imm = b12 * 2048 + (int(r11_7 / 2) % 2) * 1024 + (int(r11_7 / 4) % 4) * 256 + (int(r6_2 / 16) % 2) * 128 + (r11_7 % 2) * 64 + (r6_2 % 2) * 32 + (int(r11_7 / 16)) * 16 + (int(r6_2 / 2) % 8) * 2
if (imm >= 2048) imm -= 4096 if (imm >= 2048) imm -= 4096
if (f3 == 1) setreg(1, pc) if (f3 == 1) setreg(1, pc)
pc = (pc - 2) + imm pc = (pc - 2) + imm
@@ -324,7 +324,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
setreg(r11_7, imm) setreg(r11_7, imm)
} else if (f3 == 3) { # C.ADDI16SP / C.LUI } else if (f3 == 3) { # C.ADDI16SP / C.LUI
if (r11_7 == 2) { # C.ADDI16SP if (r11_7 == 2) { # C.ADDI16SP
imm = b12 * 512 + (int(instr / 8) % 4) * 128 + (int(instr / 32) % 2) * 64 + (int(instr / 4) % 2) * 32 + (int(instr / 64) % 2) * 16 imm = b12 * 512 + (int(r6_2 / 2) % 4) * 128 + (int(r6_2 / 8) % 2) * 64 + (r6_2 % 2) * 32 + (int(r6_2 / 16) % 2) * 16
if (imm >= 512) imm -= 1024 if (imm >= 512) imm -= 1024
if (imm == 0) trapout(sprintf("Illegal instruction C.ADDI16SP at 0x%X", pc-2)) if (imm == 0) trapout(sprintf("Illegal instruction C.ADDI16SP at 0x%X", pc-2))
setreg(2, getreg(2) + imm) setreg(2, getreg(2) + imm)
@@ -336,7 +336,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
setreg(r11_7, imm) setreg(r11_7, imm)
} }
} else if (f3 == 4) { } else if (f3 == 4) {
val = int(instr / 1024) % 4 val = int(r11_7 / 8) % 4
if (val == 0) { # C.SRLI if (val == 0) { # C.SRLI
if (shamt >= 32) trapout(sprintf("Illegal shift amount %d at 0x%X", shamt, pc-2)) if (shamt >= 32) trapout(sprintf("Illegal shift amount %d at 0x%X", shamt, pc-2))
imm = getreg(r9_7) imm = getreg(r9_7)
@@ -350,7 +350,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
if (imm >= 32) imm -= 64 if (imm >= 32) imm -= 64
setreg(r9_7, bw_and(getreg(r9_7), imm)) setreg(r9_7, bw_and(getreg(r9_7), imm))
} else if (val == 3) { # C.SUB, C.XOR, C.OR, C.AND } else if (val == 3) { # C.SUB, C.XOR, C.OR, C.AND
imm = int(instr / 32) % 4 imm = int(r6_2 / 8) % 4
if (b12 != 0) trapout(sprintf("Illegal register-register instruction at 0x%X", pc-2)) if (b12 != 0) trapout(sprintf("Illegal register-register instruction at 0x%X", pc-2))
if (imm == 0) setreg(r9_7, getreg(r9_7) - getreg(r4_2)) if (imm == 0) setreg(r9_7, getreg(r9_7) - getreg(r4_2))
else if (imm == 1) setreg(r9_7, bw_xor(getreg(r9_7), getreg(r4_2))) else if (imm == 1) setreg(r9_7, bw_xor(getreg(r9_7), getreg(r4_2)))
@@ -358,7 +358,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
else if (imm == 3) setreg(r9_7, bw_and(getreg(r9_7), getreg(r4_2))) else if (imm == 3) setreg(r9_7, bw_and(getreg(r9_7), getreg(r4_2)))
} }
} else if (f3 == 6 || f3 == 7) { # C.BEQZ / C.BNEZ } else if (f3 == 6 || f3 == 7) { # C.BEQZ / C.BNEZ
imm = b12 * 256 + (int(instr / 32) % 4) * 64 + (int(instr / 4) % 2) * 32 + (int(instr / 1024) % 4) * 8 + (int(instr / 8) % 4) * 2 imm = b12 * 256 + (int(r6_2 / 8) % 4) * 64 + (r6_2 % 2) * 32 + (int(r11_7 / 8) % 4) * 8 + (int(r6_2 / 2) % 4) * 2
if (imm >= 256) imm -= 512 if (imm >= 256) imm -= 512
val = (f3 == 6) ? (getreg(r9_7) == 0) : (getreg(r9_7) != 0) val = (f3 == 6) ? (getreg(r9_7) == 0) : (getreg(r9_7) != 0)
pc = val ? (pc - 2) + imm : pc pc = val ? (pc - 2) + imm : pc
@@ -371,7 +371,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
} }
} else if (f3 == 2) { # C.LWSP } else if (f3 == 2) { # C.LWSP
if (r11_7 == 0) trapout(sprintf("Illegal instruction C.LWSP with rd=0 at 0x%X", pc-2)) if (r11_7 == 0) trapout(sprintf("Illegal instruction C.LWSP with rd=0 at 0x%X", pc-2))
imm = (int(instr / 4) % 4) * 64 + b12 * 32 + (int(instr / 16) % 8) * 4 imm = (r6_2 % 4) * 64 + b12 * 32 + (int(r6_2 / 4) % 8) * 4
base = (getreg(2) + imm) % 4294967296 base = (getreg(2) + imm) % 4294967296
if (base < 0) base += 4294967296 if (base < 0) base += 4294967296
val = MEM[base] + MEM[(base+1)%4294967296]*256 + MEM[(base+2)%4294967296]*65536 + MEM[(base+3)%4294967296]*16777216 val = MEM[base] + MEM[(base+1)%4294967296]*256 + MEM[(base+2)%4294967296]*65536 + MEM[(base+3)%4294967296]*16777216
@@ -398,7 +398,7 @@ function amach_comp(instr, op, f3, b12, r11_7, r9_7, r6_2, r4_2, shamt, imm, ba
} }
} }
} else if (f3 == 6) { # C.SWSP } else if (f3 == 6) { # C.SWSP
imm = (int(instr / 128) % 4) * 64 + (int(instr / 512) % 16) * 4 imm = (r11_7 % 4) * 64 + int(r11_7 / 4) * 4 + b12 * 32
base = (getreg(2) + imm) % 4294967296 base = (getreg(2) + imm) % 4294967296
if (base < 0) base += 4294967296 if (base < 0) base += 4294967296
val = getreg(r6_2) val = getreg(r6_2)