1946 lines
42 KiB
Devicetree
1946 lines
42 KiB
Devicetree
/dts-v1/;
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/ {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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interrupt-parent = <0x01>;
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model = "Nokia 8000 4G";
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compatible = "nokia,sparkler", "qcom,msm8909";
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chassis-type = "handset";
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aliases {
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mmc0 = "/soc@0/sdhci@7824000";
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mmc1 = "/soc@0/sdhci@7864000";
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serial0 = "/soc@0/serial@78af000";
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};
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chosen {
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stdout-path = "serial0";
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};
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clocks {
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xo-board {
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compatible = "fixed-clock";
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#clock-cells = <0x00>;
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clock-frequency = <0x124f800>;
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phandle = <0x18>;
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};
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sleep-clk {
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compatible = "fixed-clock";
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#clock-cells = <0x00>;
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clock-frequency = <0x8000>;
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phandle = <0x28>;
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};
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};
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cpus {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x00>;
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next-level-cache = <0x02>;
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enable-method = "qcom,msm8909-smp";
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clocks = <0x03>;
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#cooling-cells = <0x02>;
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power-domains = <0x04 0x01>;
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power-domain-names = "perf";
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operating-points-v2 = <0x05>;
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cpu-idle-states = <0x06>;
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qcom,acc = <0x07>;
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qcom,saw = <0x08>;
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phandle = <0x75>;
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};
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cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x01>;
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next-level-cache = <0x02>;
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enable-method = "qcom,msm8909-smp";
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clocks = <0x03>;
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#cooling-cells = <0x02>;
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power-domains = <0x04 0x01>;
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power-domain-names = "perf";
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operating-points-v2 = <0x05>;
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cpu-idle-states = <0x06>;
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qcom,acc = <0x09>;
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qcom,saw = <0x0a>;
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phandle = <0x76>;
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};
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cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x02>;
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next-level-cache = <0x02>;
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enable-method = "qcom,msm8909-smp";
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clocks = <0x03>;
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#cooling-cells = <0x02>;
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power-domains = <0x04 0x01>;
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power-domain-names = "perf";
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operating-points-v2 = <0x05>;
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cpu-idle-states = <0x06>;
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qcom,acc = <0x0b>;
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qcom,saw = <0x0c>;
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phandle = <0x77>;
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};
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cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a7";
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reg = <0x03>;
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next-level-cache = <0x02>;
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enable-method = "qcom,msm8909-smp";
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clocks = <0x03>;
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#cooling-cells = <0x02>;
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power-domains = <0x04 0x01>;
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power-domain-names = "perf";
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operating-points-v2 = <0x05>;
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cpu-idle-states = <0x06>;
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qcom,acc = <0x0d>;
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qcom,saw = <0x0e>;
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phandle = <0x78>;
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};
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l2-cache {
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compatible = "cache";
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cache-level = <0x02>;
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phandle = <0x02>;
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};
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idle-states {
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cpu-sleep-0 {
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compatible = "qcom,idle-state-spc";
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idle-state-name = "standalone-power-collapse";
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entry-latency-us = <0xb4>;
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exit-latency-us = <0xf0>;
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min-residency-us = <0x4ec>;
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local-timer-stop;
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phandle = <0x06>;
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};
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};
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};
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cpu-opp-table {
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compatible = "operating-points-v2-kryo-cpu", "operating-points-v2";
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nvmem-cells = <0x0f>;
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opp-shared;
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phandle = <0x05>;
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opp-199999951 {
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opp-hz = <0x00 0xbebc1cf>;
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required-opps = <0x10>;
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opp-supported-hw = <0xff>;
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};
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opp-399999902 {
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opp-hz = <0x00 0x17d7839e>;
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required-opps = <0x11>;
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opp-supported-hw = <0xff>;
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};
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opp-533333202 {
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opp-hz = <0x00 0x1fca04d2>;
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required-opps = <0x11>;
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opp-supported-hw = <0xff>;
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};
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opp-799999804 {
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opp-hz = <0x00 0x2faf073c>;
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required-opps = <0x12>;
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opp-supported-hw = <0xff>;
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};
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opp-998400000 {
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opp-hz = <0x00 0x3b826000>;
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required-opps = <0x12>;
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opp-supported-hw = <0x05>;
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};
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opp-1094400000 {
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opp-hz = <0x00 0x413b3800>;
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required-opps = <0x13>;
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opp-supported-hw = <0x05>;
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};
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opp-1248000000 {
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opp-hz = <0x00 0x4a62f800>;
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required-opps = <0x13>;
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opp-supported-hw = <0x01>;
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};
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opp-1267200000 {
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opp-hz = <0x00 0x4b87f000>;
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required-opps = <0x13>;
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opp-supported-hw = <0x01>;
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};
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};
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firmware {
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scm {
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compatible = "qcom,scm-msm8916", "qcom,scm";
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clocks = <0x14 0x3d 0x14 0x3f 0x14 0x3e>;
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clock-names = "core", "bus", "iface";
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qcom,dload-mode = <0x15 0x6100>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0x00>;
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};
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pmu {
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compatible = "arm,cortex-a7-pmu";
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interrupts = <0x01 0x07 0xf04>;
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};
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reserved-memory {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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tz-apps@87a00000 {
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reg = <0x87a00000 0x200000>;
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no-map;
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};
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rfsa@87ce0000 {
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reg = <0x87ce0000 0x20000>;
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no-map;
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};
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smem@87d00000 {
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compatible = "qcom,smem";
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reg = <0x87d00000 0x100000>;
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no-map;
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hwlocks = <0x16 0x03>;
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qcom,rpm-msg-ram = <0x17>;
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};
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tz@87e00000 {
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reg = <0x87e00000 0x200000>;
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no-map;
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};
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mpss@88000000 {
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reg = <0x88000000 0x5000000>;
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no-map;
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phandle = <0x32>;
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};
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mba@8dc00000 {
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reg = <0x8dc00000 0x100000>;
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no-map;
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phandle = <0x31>;
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};
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reserved@84a00000 {
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reg = <0x84a00000 0x400000>;
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no-map;
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};
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wcnss@8d000000 {
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reg = <0x8d000000 0x700000>;
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no-map;
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phandle = <0x69>;
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};
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rmtfs@9e900000 {
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compatible = "qcom,rmtfs-mem";
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reg = <0x9e900000 0x300000>;
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no-map;
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qcom,client-id = <0x01>;
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};
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};
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smd {
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compatible = "qcom,smd";
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rpm {
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interrupts = <0x00 0xa8 0x01>;
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qcom,ipc = <0x03 0x08 0x00>;
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qcom,smd-edge = <0x0f>;
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rpm-requests {
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compatible = "qcom,rpm-msm8909";
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qcom,smd-channels = "rpm_requests";
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clock-controller {
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compatible = "qcom,rpmcc-msm8909", "qcom,rpmcc";
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#clock-cells = <0x01>;
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clocks = <0x18>;
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clock-names = "xo";
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phandle = <0x6d>;
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};
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power-controller {
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compatible = "qcom,msm8909-rpmpd";
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#power-domain-cells = <0x01>;
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operating-points-v2 = <0x19>;
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phandle = <0x04>;
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opp-table {
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compatible = "operating-points-v2";
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phandle = <0x19>;
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opp1 {
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opp-level = <0x01>;
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phandle = <0x10>;
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};
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opp2 {
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opp-level = <0x02>;
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};
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opp3 {
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opp-level = <0x03>;
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phandle = <0x11>;
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};
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opp4 {
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opp-level = <0x04>;
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phandle = <0x12>;
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};
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opp5 {
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opp-level = <0x05>;
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};
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opp6 {
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opp-level = <0x06>;
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phandle = <0x13>;
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};
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};
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};
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pm8909-regulators {
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compatible = "qcom,rpm-pm8909-regulators";
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s2 {
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regulator-min-microvolt = <0x1c3a90>;
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regulator-max-microvolt = <0x1c3a90>;
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};
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l1 {
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regulator-min-microvolt = <0xf4240>;
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regulator-max-microvolt = <0xf4240>;
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};
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l2 {
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regulator-min-microvolt = <0x124f80>;
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regulator-max-microvolt = <0x124f80>;
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};
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l4 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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};
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l5 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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phandle = <0x3d>;
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};
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l6 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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phandle = <0x61>;
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};
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l7 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x1b7740>;
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phandle = <0x30>;
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};
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l8 {
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regulator-min-microvolt = <0x2b7cd0>;
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regulator-max-microvolt = <0x2c4020>;
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phandle = <0x3c>;
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};
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l9 {
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regulator-min-microvolt = <0x2dc6c0>;
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regulator-max-microvolt = <0x325aa0>;
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phandle = <0x6f>;
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};
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l10 {
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regulator-min-microvolt = <0x12b128>;
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regulator-max-microvolt = <0x13d620>;
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phandle = <0x6e>;
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};
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l11 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x2d0370>;
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regulator-allow-set-load;
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regulator-system-load = <0x30d40>;
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phandle = <0x44>;
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};
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l12 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x2d0370>;
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phandle = <0x45>;
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};
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l13 {
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regulator-min-microvolt = <0x2eebb8>;
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regulator-max-microvolt = <0x2eebb8>;
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phandle = <0x68>;
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};
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l14 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x2dc6c0>;
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};
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l15 {
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regulator-min-microvolt = <0x1b7740>;
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regulator-max-microvolt = <0x2dc6c0>;
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};
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l17 {
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regulator-min-microvolt = <0x2b7cd0>;
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regulator-max-microvolt = <0x2b7cd0>;
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phandle = <0x60>;
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};
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l18 {
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regulator-min-microvolt = <0x2932e0>;
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regulator-max-microvolt = <0x2932e0>;
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};
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};
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};
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};
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};
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smp2p-hexagon {
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compatible = "qcom,smp2p";
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qcom,smem = <0x1b3 0x1ac>;
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interrupts = <0x00 0x1b 0x01>;
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qcom,ipc = <0x03 0x08 0x0e>;
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qcom,local-pid = <0x00>;
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qcom,remote-pid = <0x01>;
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master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <0x01>;
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phandle = <0x2f>;
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};
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slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <0x02>;
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phandle = <0x2e>;
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};
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};
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smp2p-wcnss {
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compatible = "qcom,smp2p";
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qcom,smem = <0x1c3 0x1af>;
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interrupts = <0x00 0x8f 0x01>;
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qcom,ipc = <0x03 0x08 0x12>;
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qcom,local-pid = <0x00>;
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qcom,remote-pid = <0x04>;
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master-kernel {
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qcom,entry-name = "master-kernel";
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#qcom,smem-state-cells = <0x01>;
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phandle = <0x6b>;
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};
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slave-kernel {
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qcom,entry-name = "slave-kernel";
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interrupt-controller;
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#interrupt-cells = <0x02>;
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phandle = <0x6a>;
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};
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};
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smsm {
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compatible = "qcom,smsm";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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qcom,ipc-1 = <0x03 0x08 0x0d>;
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qcom,ipc-3 = <0x03 0x08 0x13>;
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apps@0 {
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reg = <0x00>;
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#qcom,smem-state-cells = <0x01>;
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phandle = <0x34>;
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};
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hexagon@1 {
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reg = <0x01>;
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interrupts = <0x00 0x1a 0x01>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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phandle = <0x33>;
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};
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wcnss@6 {
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reg = <0x06>;
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interrupts = <0x00 0x90 0x01>;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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};
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};
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soc@0 {
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compatible = "simple-bus";
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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rng@22000 {
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compatible = "qcom,prng";
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reg = <0x22000 0x200>;
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clocks = <0x14 0x44>;
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clock-names = "core";
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};
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qfprom@5c000 {
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compatible = "qcom,qfprom";
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reg = <0x5c000 0x1000>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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speedbin@c {
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reg = <0x0c 0x01>;
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bits = <0x02 0x03>;
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phandle = <0x0f>;
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};
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s0-p1@a0 {
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reg = <0xa0 0x01>;
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bits = <0x00 0x06>;
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phandle = <0x1d>;
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};
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s0-p2@a0 {
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reg = <0xa0 0x02>;
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bits = <0x06 0x06>;
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phandle = <0x1e>;
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};
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s1-p1@a1 {
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reg = <0xa1 0x02>;
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bits = <0x04 0x06>;
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phandle = <0x1f>;
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};
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s1-p2@a2 {
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reg = <0xa2 0x01>;
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bits = <0x02 0x06>;
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phandle = <0x20>;
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};
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s2-p1@a3 {
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reg = <0xa3 0x01>;
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bits = <0x00 0x06>;
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phandle = <0x21>;
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};
|
|
|
|
s2-p2@a3 {
|
|
reg = <0xa3 0x02>;
|
|
bits = <0x06 0x06>;
|
|
phandle = <0x22>;
|
|
};
|
|
|
|
s3-p1@a4 {
|
|
reg = <0xa4 0x02>;
|
|
bits = <0x04 0x06>;
|
|
phandle = <0x23>;
|
|
};
|
|
|
|
s3-p2@a5 {
|
|
reg = <0xa5 0x01>;
|
|
bits = <0x02 0x06>;
|
|
phandle = <0x24>;
|
|
};
|
|
|
|
s4-p1@a6 {
|
|
reg = <0xa6 0x01>;
|
|
bits = <0x00 0x06>;
|
|
phandle = <0x25>;
|
|
};
|
|
|
|
s4-p2@a6 {
|
|
reg = <0xa6 0x02>;
|
|
bits = <0x06 0x06>;
|
|
phandle = <0x26>;
|
|
};
|
|
|
|
base1@dc {
|
|
reg = <0xdc 0x01>;
|
|
bits = <0x00 0x08>;
|
|
phandle = <0x1b>;
|
|
};
|
|
|
|
base2@dd {
|
|
reg = <0xdd 0x01>;
|
|
bits = <0x00 0x08>;
|
|
phandle = <0x1c>;
|
|
};
|
|
|
|
mode@de {
|
|
reg = <0xde 0x01>;
|
|
bits = <0x00 0x03>;
|
|
phandle = <0x1a>;
|
|
};
|
|
};
|
|
|
|
sram@60000 {
|
|
compatible = "qcom,rpm-msg-ram";
|
|
reg = <0x60000 0x8000>;
|
|
phandle = <0x17>;
|
|
};
|
|
|
|
sram@290000 {
|
|
compatible = "qcom,rpm-stats";
|
|
reg = <0x290000 0x10000>;
|
|
};
|
|
|
|
thermal-sensor@4a9000 {
|
|
compatible = "qcom,msm8909-tsens", "qcom,tsens-v0_1";
|
|
reg = <0x4a9000 0x1000 0x4a8000 0x1000>;
|
|
nvmem-cells = <0x1a 0x1b 0x1c 0x1d 0x1e 0x1f 0x20 0x21 0x22 0x23 0x24 0x25 0x26>;
|
|
nvmem-cell-names = "mode", "base1", "base2", "s0_p1", "s0_p2", "s1_p1", "s1_p2", "s2_p1", "s2_p2", "s3_p1", "s3_p2", "s4_p1", "s4_p2";
|
|
interrupts = <0x00 0xb8 0x04>;
|
|
interrupt-names = "uplow";
|
|
#thermal-sensor-cells = <0x01>;
|
|
#qcom,sensors = <0x05>;
|
|
phandle = <0x73>;
|
|
};
|
|
|
|
restart@4ab000 {
|
|
compatible = "qcom,pshold";
|
|
reg = <0x4ab000 0x04>;
|
|
};
|
|
|
|
pinctrl@1000000 {
|
|
compatible = "qcom,msm8909-tlmm";
|
|
reg = <0x1000000 0x300000>;
|
|
interrupts = <0x00 0xd0 0x04>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x27 0x00 0x00 0x75>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
phandle = <0x27>;
|
|
|
|
blsp-i2c1-default-state {
|
|
pins = "gpio6", "gpio7";
|
|
function = "blsp_i2c1";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x4b>;
|
|
};
|
|
|
|
blsp-i2c1-sleep-state {
|
|
pins = "gpio6", "gpio7";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x4c>;
|
|
};
|
|
|
|
blsp-i2c2-default-state {
|
|
pins = "gpio111", "gpio112";
|
|
function = "blsp_i2c2";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x4f>;
|
|
};
|
|
|
|
blsp-i2c2-sleep-state {
|
|
pins = "gpio111", "gpio112";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x50>;
|
|
};
|
|
|
|
blsp-i2c3-default-state {
|
|
pins = "gpio29", "gpio30";
|
|
function = "blsp_i2c3";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x53>;
|
|
};
|
|
|
|
blsp-i2c3-sleep-state {
|
|
pins = "gpio29", "gpio30";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x54>;
|
|
};
|
|
|
|
blsp-i2c4-default-state {
|
|
pins = "gpio14", "gpio15";
|
|
function = "blsp_i2c4";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x57>;
|
|
};
|
|
|
|
blsp-i2c4-sleep-state {
|
|
pins = "gpio14", "gpio15";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x58>;
|
|
};
|
|
|
|
blsp-i2c5-default-state {
|
|
pins = "gpio18", "gpio19";
|
|
function = "blsp_i2c5";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x5b>;
|
|
};
|
|
|
|
blsp-i2c5-sleep-state {
|
|
pins = "gpio18", "gpio19";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x5c>;
|
|
};
|
|
|
|
blsp-i2c6-default-state {
|
|
pins = "gpio10", "gpio11";
|
|
function = "blsp_i2c6";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x63>;
|
|
};
|
|
|
|
blsp-i2c6-sleep-state {
|
|
pins = "gpio10", "gpio11";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x64>;
|
|
};
|
|
|
|
blsp-spi1-default-state {
|
|
pins = "gpio4", "gpio5", "gpio6", "gpio7";
|
|
function = "blsp_spi1";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x4d>;
|
|
};
|
|
|
|
blsp-spi1-sleep-state {
|
|
pins = "gpio4", "gpio5", "gpio6", "gpio7";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x4e>;
|
|
};
|
|
|
|
blsp-spi2-default-state {
|
|
pins = "gpio20", "gpio21", "gpio111", "gpio112";
|
|
function = "blsp_spi2";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x51>;
|
|
};
|
|
|
|
blsp-spi2-sleep-state {
|
|
pins = "gpio20", "gpio21", "gpio111", "gpio112";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x52>;
|
|
};
|
|
|
|
blsp-spi3-default-state {
|
|
pins = "gpio0", "gpio1", "gpio2", "gpio3";
|
|
function = "blsp_spi3";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x55>;
|
|
};
|
|
|
|
blsp-spi3-sleep-state {
|
|
pins = "gpio0", "gpio1", "gpio2", "gpio3";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x56>;
|
|
};
|
|
|
|
blsp-spi4-default-state {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
function = "blsp_spi4";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x59>;
|
|
};
|
|
|
|
blsp-spi4-sleep-state {
|
|
pins = "gpio12", "gpio13", "gpio14", "gpio15";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x5a>;
|
|
};
|
|
|
|
blsp-spi5-default-state {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
function = "blsp_spi5";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x5d>;
|
|
};
|
|
|
|
blsp-spi5-sleep-state {
|
|
pins = "gpio16", "gpio17", "gpio18", "gpio19";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x5e>;
|
|
};
|
|
|
|
blsp-spi6-default-state {
|
|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
function = "blsp_spi6";
|
|
drive-strength = <0x0c>;
|
|
bias-disable;
|
|
phandle = <0x65>;
|
|
};
|
|
|
|
blsp-spi6-sleep-state {
|
|
pins = "gpio8", "gpio9", "gpio10", "gpio11";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x66>;
|
|
};
|
|
|
|
blsp-uart1-default-state {
|
|
pins = "gpio4", "gpio5";
|
|
function = "blsp_uart1";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x47>;
|
|
};
|
|
|
|
blsp-uart1-sleep-state {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x48>;
|
|
};
|
|
|
|
blsp-uart2-default-state {
|
|
pins = "gpio20", "gpio21";
|
|
function = "blsp_uart2";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x49>;
|
|
};
|
|
|
|
blsp-uart2-sleep-state {
|
|
pins = "gpio20", "gpio21";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x4a>;
|
|
};
|
|
|
|
sdc1-clk-on-state {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <0x10>;
|
|
phandle = <0x36>;
|
|
};
|
|
|
|
sdc1-clk-off-state {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x39>;
|
|
};
|
|
|
|
sdc1-cmd-on-state {
|
|
pins = "sdc1_cmd";
|
|
bias-disable;
|
|
drive-strength = <0x0a>;
|
|
phandle = <0x37>;
|
|
};
|
|
|
|
sdc1-cmd-off-state {
|
|
pins = "sdc1_cmd";
|
|
bias-disable;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x3a>;
|
|
};
|
|
|
|
sdc1-data-on-state {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <0x0a>;
|
|
phandle = <0x38>;
|
|
};
|
|
|
|
sdc1-data-off-state {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x3b>;
|
|
};
|
|
|
|
sdc2-clk-on-state {
|
|
pins = "sdc2_clk";
|
|
drive-strength = <0x10>;
|
|
bias-disable;
|
|
phandle = <0x3e>;
|
|
};
|
|
|
|
sdc2-clk-off-state {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x41>;
|
|
};
|
|
|
|
sdc2-cmd-on-state {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <0x0a>;
|
|
phandle = <0x3f>;
|
|
};
|
|
|
|
sdc2-cmd-off-state {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x42>;
|
|
};
|
|
|
|
sdc2-data-on-state {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <0x0a>;
|
|
phandle = <0x40>;
|
|
};
|
|
|
|
sdc2-data-off-state {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <0x02>;
|
|
phandle = <0x43>;
|
|
};
|
|
|
|
wcnss-active-state {
|
|
pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44";
|
|
function = "wcss_wlan";
|
|
drive-strength = <0x06>;
|
|
bias-pull-up;
|
|
phandle = <0x6c>;
|
|
};
|
|
|
|
gpio-key-active-state {
|
|
pins = "gpio90";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-up;
|
|
phandle = <0x7b>;
|
|
};
|
|
|
|
matrix-keypad-row-default-state {
|
|
pins = "gpio94", "gpio95", "gpio96", "gpio97";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-up;
|
|
phandle = <0x7c>;
|
|
};
|
|
|
|
matrix-keypad-col-default-state {
|
|
pins = "gpio0", "gpio3", "gpio7", "gpio99", "gpio6", "gpio1";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-disable;
|
|
phandle = <0x7d>;
|
|
};
|
|
|
|
panel-gpios-default-state {
|
|
pins = "gpio24", "gpio25", "gpio110";
|
|
function = "gpio";
|
|
drive-strength = <0x02>;
|
|
bias-pull-down;
|
|
phandle = <0x62>;
|
|
};
|
|
};
|
|
|
|
clock-controller@1800000 {
|
|
compatible = "qcom,gcc-msm8909";
|
|
reg = <0x1800000 0x80000>;
|
|
#clock-cells = <0x01>;
|
|
#reset-cells = <0x01>;
|
|
#power-domain-cells = <0x01>;
|
|
clocks = <0x18 0x28 0x00 0x00>;
|
|
clock-names = "xo", "sleep_clk", "dsi0pll", "dsi0pllbyte";
|
|
phandle = <0x14>;
|
|
};
|
|
|
|
hwlock@1905000 {
|
|
compatible = "qcom,tcsr-mutex";
|
|
reg = <0x1905000 0x20000>;
|
|
#hwlock-cells = <0x01>;
|
|
phandle = <0x16>;
|
|
};
|
|
|
|
syscon@1937000 {
|
|
compatible = "qcom,tcsr-msm8909", "syscon";
|
|
reg = <0x1937000 0x30000>;
|
|
phandle = <0x15>;
|
|
};
|
|
|
|
spmi@200f000 {
|
|
compatible = "qcom,spmi-pmic-arb";
|
|
reg = <0x200f000 0x1000 0x2400000 0x400000 0x2c00000 0x400000 0x3800000 0x200000 0x200a000 0x2100>;
|
|
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
|
|
interrupt-names = "periph_irq";
|
|
interrupts = <0x00 0xbe 0x04>;
|
|
qcom,ee = <0x00>;
|
|
qcom,channel = <0x00>;
|
|
#address-cells = <0x02>;
|
|
#size-cells = <0x00>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x04>;
|
|
|
|
pmic@0 {
|
|
compatible = "qcom,pm8909", "qcom,spmi-pmic";
|
|
reg = <0x00 0x00>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
pon@800 {
|
|
compatible = "qcom,pm8916-pon";
|
|
reg = <0x800>;
|
|
mode-bootloader = <0x02>;
|
|
mode-recovery = <0x01>;
|
|
|
|
pwrkey {
|
|
compatible = "qcom,pm8941-pwrkey";
|
|
interrupts = <0x00 0x08 0x00 0x03>;
|
|
debounce = <0x3d09>;
|
|
bias-pull-up;
|
|
linux,code = <0x74>;
|
|
};
|
|
|
|
resin {
|
|
compatible = "qcom,pm8941-resin";
|
|
interrupts = <0x00 0x08 0x01 0x03>;
|
|
debounce = <0x3d09>;
|
|
bias-pull-up;
|
|
status = "okay";
|
|
linux,code = <0x20b>;
|
|
};
|
|
|
|
watchdog {
|
|
compatible = "qcom,pm8916-wdt";
|
|
interrupts = <0x00 0x08 0x06 0x01>;
|
|
timeout-sec = <0x3c>;
|
|
};
|
|
};
|
|
|
|
charger@1000 {
|
|
compatible = "qcom,pm8916-lbc";
|
|
reg = <0x1000 0x1200 0x1300 0x1600>;
|
|
reg-names = "chgr", "bat_if", "usb", "misc";
|
|
interrupts = <0x00 0x10 0x00 0x03 0x00 0x10 0x05 0x03 0x00 0x10 0x06 0x03 0x00 0x10 0x07 0x03 0x00 0x12 0x00 0x03 0x00 0x12 0x01 0x03 0x00 0x13 0x00 0x03 0x00 0x13 0x01 0x03 0x00 0x13 0x02 0x03 0x00 0x13 0x04 0x03>;
|
|
interrupt-names = "vbat_det", "fast_chg", "chg_fail", "chg_done", "bat_pres", "temp_ok", "coarse_det", "usb_vbus", "chg_gone", "overtemp";
|
|
status = "okay";
|
|
qcom,fast-charge-safe-current = <0x41eb0>;
|
|
qcom,fast-charge-safe-voltage = <0x3f52f0>;
|
|
monitored-battery = <0x29>;
|
|
phandle = <0x2a>;
|
|
};
|
|
|
|
extcon@1300 {
|
|
compatible = "qcom,pm8941-misc";
|
|
reg = <0x1300>;
|
|
interrupts = <0x00 0x13 0x01 0x03>;
|
|
interrupt-names = "usb_vbus";
|
|
status = "disabled";
|
|
};
|
|
|
|
vm-bms@4000 {
|
|
compatible = "qcom,pm8916-bms-vm";
|
|
reg = <0x4000>;
|
|
interrupts = <0x00 0x40 0x00 0x01 0x00 0x40 0x01 0x01 0x00 0x40 0x02 0x01 0x00 0x40 0x03 0x01 0x00 0x40 0x04 0x01 0x00 0x40 0x05 0x01>;
|
|
interrupt-names = "cv_leave", "cv_enter", "ocv_good", "ocv_thr", "fifo", "state_chg";
|
|
status = "okay";
|
|
monitored-battery = <0x29>;
|
|
power-supplies = <0x2a>;
|
|
};
|
|
|
|
rtc@6000 {
|
|
compatible = "qcom,pm8941-rtc";
|
|
reg = <0x6000>;
|
|
interrupts = <0x00 0x61 0x01 0x01>;
|
|
};
|
|
|
|
mpps@a000 {
|
|
compatible = "qcom,pm8916-mpp", "qcom,spmi-mpp";
|
|
reg = <0xa000>;
|
|
gpio-controller;
|
|
#gpio-cells = <0x02>;
|
|
gpio-ranges = <0x2b 0x00 0x00 0x04>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
phandle = <0x2b>;
|
|
|
|
mpp2-state {
|
|
pins = "mpp2";
|
|
function = "digital";
|
|
power-source = <0x00>;
|
|
output-low;
|
|
qcom,dtest = <0x01>;
|
|
phandle = <0x2d>;
|
|
};
|
|
};
|
|
|
|
gpios@c000 {
|
|
compatible = "qcom,pm8916-gpio", "qcom,spmi-gpio";
|
|
reg = <0xc000>;
|
|
gpio-controller;
|
|
gpio-ranges = <0x2c 0x00 0x00 0x04>;
|
|
#gpio-cells = <0x02>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x02>;
|
|
phandle = <0x2c>;
|
|
|
|
keypad-backlight-default-state {
|
|
pins = "gpio1";
|
|
function = "normal";
|
|
power-source = <0x02>;
|
|
output-low;
|
|
phandle = <0x7e>;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmic@1 {
|
|
compatible = "qcom,pm8909", "qcom,spmi-pmic";
|
|
reg = <0x01 0x00>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
|
|
pwm {
|
|
compatible = "qcom,pm8916-pwm";
|
|
#pwm-cells = <0x02>;
|
|
status = "okay";
|
|
pinctrl-0 = <0x2d>;
|
|
pinctrl-names = "default";
|
|
phandle = <0x7a>;
|
|
};
|
|
|
|
vibrator@c000 {
|
|
compatible = "qcom,pm8916-vib";
|
|
reg = <0xc000>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|
|
|
|
dma-controller@4044000 {
|
|
compatible = "qcom,bam-v1.7.0";
|
|
reg = <0x4044000 0x19000>;
|
|
interrupts = <0x00 0x1d 0x04>;
|
|
#dma-cells = <0x01>;
|
|
qcom,ee = <0x00>;
|
|
num-channels = <0x06>;
|
|
qcom,num-ees = <0x01>;
|
|
qcom,powered-remotely;
|
|
phandle = <0x35>;
|
|
};
|
|
|
|
remoteproc@4080000 {
|
|
compatible = "qcom,msm8909-mss-pil";
|
|
reg = <0x4080000 0x100 0x4020000 0x40>;
|
|
reg-names = "qdsp6", "rmb";
|
|
interrupts-extended = <0x01 0x00 0x18 0x01 0x2e 0x00 0x01 0x2e 0x01 0x01 0x2e 0x02 0x01 0x2e 0x03 0x01>;
|
|
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
|
|
power-domains = <0x04 0x00 0x04 0x04>;
|
|
power-domain-names = "cx", "mx";
|
|
clocks = <0x14 0x79 0x14 0x7a 0x14 0x3c 0x18>;
|
|
clock-names = "iface", "bus", "mem", "xo";
|
|
qcom,smem-states = <0x2f 0x00>;
|
|
qcom,smem-state-names = "stop";
|
|
resets = <0x14 0x29>;
|
|
reset-names = "mss_restart";
|
|
qcom,halt-regs = <0x15 0x18000 0x19000 0x1a000>;
|
|
status = "okay";
|
|
pll-supply = <0x30>;
|
|
|
|
mba {
|
|
memory-region = <0x31>;
|
|
};
|
|
|
|
mpss {
|
|
memory-region = <0x32>;
|
|
};
|
|
|
|
bam-dmux {
|
|
compatible = "qcom,bam-dmux";
|
|
interrupt-parent = <0x33>;
|
|
interrupts = <0x01 0x03 0x0b 0x03>;
|
|
interrupt-names = "pc", "pc-ack";
|
|
qcom,smem-states = <0x34 0x01 0x34 0x0b>;
|
|
qcom,smem-state-names = "pc", "pc-ack";
|
|
dmas = <0x35 0x04 0x35 0x05>;
|
|
dma-names = "tx", "rx";
|
|
};
|
|
|
|
smd-edge {
|
|
interrupts = <0x00 0x19 0x01>;
|
|
qcom,smd-edge = <0x00>;
|
|
qcom,ipc = <0x03 0x08 0x0c>;
|
|
qcom,remote-pid = <0x01>;
|
|
label = "hexagon";
|
|
};
|
|
};
|
|
|
|
sdhci@7824000 {
|
|
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
|
|
reg = <0x7824900 0x11c 0x7824000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0x00 0x7b 0x04 0x00 0x8a 0x04>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
clocks = <0x14 0x80 0x14 0x7f 0x18>;
|
|
clock-names = "core", "iface", "xo";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x36 0x37 0x38>;
|
|
pinctrl-1 = <0x39 0x3a 0x3b>;
|
|
mmc-hs200-1_8v;
|
|
mmc-ddr-1_8v;
|
|
bus-width = <0x08>;
|
|
non-removable;
|
|
status = "okay";
|
|
vmmc-supply = <0x3c>;
|
|
vqmmc-supply = <0x3d>;
|
|
};
|
|
|
|
sdhci@7864000 {
|
|
compatible = "qcom,msm8916-sdhci", "qcom,sdhci-msm-v4";
|
|
reg = <0x7864900 0x11c 0x7864000 0x800>;
|
|
reg-names = "hc_mem", "core_mem";
|
|
interrupts = <0x00 0x7d 0x04 0x00 0xdd 0x04>;
|
|
interrupt-names = "hc_irq", "pwr_irq";
|
|
clocks = <0x14 0x82 0x14 0x81 0x18>;
|
|
clock-names = "core", "iface", "xo";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x3e 0x3f 0x40>;
|
|
pinctrl-1 = <0x41 0x42 0x43>;
|
|
bus-width = <0x04>;
|
|
status = "okay";
|
|
vmmc-supply = <0x44>;
|
|
vqmmc-supply = <0x45>;
|
|
non-removable;
|
|
};
|
|
|
|
dma-controller@7884000 {
|
|
compatible = "qcom,bam-v1.7.0";
|
|
reg = <0x7884000 0x23000>;
|
|
interrupts = <0x00 0xee 0x04>;
|
|
clocks = <0x14 0x3a>;
|
|
clock-names = "bam_clk";
|
|
#dma-cells = <0x01>;
|
|
qcom,ee = <0x00>;
|
|
qcom,controlled-remotely;
|
|
phandle = <0x46>;
|
|
};
|
|
|
|
serial@78af000 {
|
|
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
|
reg = <0x78af000 0x200>;
|
|
interrupts = <0x00 0x6b 0x04>;
|
|
clocks = <0x14 0x56 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x00 0x46 0x01>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x47>;
|
|
pinctrl-1 = <0x48>;
|
|
status = "okay";
|
|
};
|
|
|
|
serial@78b0000 {
|
|
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
|
|
reg = <0x78b0000 0x200>;
|
|
interrupts = <0x00 0x6c 0x04>;
|
|
clocks = <0x14 0x57 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x02 0x46 0x03>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x49>;
|
|
pinctrl-1 = <0x4a>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@78b5000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78b5000 0x500>;
|
|
interrupts = <0x00 0x5f 0x04>;
|
|
clocks = <0x14 0x4a 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x04 0x46 0x05>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x4b>;
|
|
pinctrl-1 = <0x4c>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78b5000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78b5000 0x500>;
|
|
interrupts = <0x00 0x5f 0x04>;
|
|
clocks = <0x14 0x4b 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x04 0x46 0x05>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x4d>;
|
|
pinctrl-1 = <0x4e>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@78b6000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78b6000 0x500>;
|
|
interrupts = <0x00 0x60 0x04>;
|
|
clocks = <0x14 0x4c 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x06 0x46 0x07>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x4f>;
|
|
pinctrl-1 = <0x50>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78b6000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78b6000 0x500>;
|
|
interrupts = <0x00 0x60 0x04>;
|
|
clocks = <0x14 0x4d 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x06 0x46 0x07>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x51>;
|
|
pinctrl-1 = <0x52>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@78b7000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78b7000 0x500>;
|
|
interrupts = <0x00 0x61 0x04>;
|
|
clocks = <0x14 0x4e 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x08 0x46 0x09>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x53>;
|
|
pinctrl-1 = <0x54>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78b7000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78b7000 0x500>;
|
|
interrupts = <0x00 0x61 0x04>;
|
|
clocks = <0x14 0x4f 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x08 0x46 0x09>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x55>;
|
|
pinctrl-1 = <0x56>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@78b8000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78b8000 0x500>;
|
|
interrupts = <0x00 0x62 0x04>;
|
|
clocks = <0x14 0x50 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0a 0x46 0x0b>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x57>;
|
|
pinctrl-1 = <0x58>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78b8000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78b8000 0x500>;
|
|
interrupts = <0x00 0x62 0x04>;
|
|
clocks = <0x14 0x51 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0a 0x46 0x0b>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x59>;
|
|
pinctrl-1 = <0x5a>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
i2c@78b9000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78b9000 0x500>;
|
|
interrupts = <0x00 0x63 0x04>;
|
|
clocks = <0x14 0x52 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0c 0x46 0x0d>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x5b>;
|
|
pinctrl-1 = <0x5c>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78b9000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78b9000 0x500>;
|
|
interrupts = <0x00 0x63 0x04>;
|
|
clocks = <0x14 0x53 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0c 0x46 0x0d>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x5d>;
|
|
pinctrl-1 = <0x5e>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "okay";
|
|
|
|
display@0 {
|
|
compatible = "nokia,sparkler-gc9307-hlt-28-panel", "panel-mipi-dbi-spi";
|
|
reg = <0x00>;
|
|
backlight = <0x5f>;
|
|
reset-gpios = <0x27 0x19 0x00>;
|
|
dc-gpios = <0x27 0x6e 0x00>;
|
|
spi-max-frequency = <0x2faf080>;
|
|
power-supply = <0x60>;
|
|
io-supply = <0x61>;
|
|
pinctrl-0 = <0x62>;
|
|
pinctrl-names = "default";
|
|
status = "okay";
|
|
width-mm = <0x2a>;
|
|
height-mm = <0x38>;
|
|
|
|
panel-timing {
|
|
hactive = <0xf0>;
|
|
vactive = <0x140>;
|
|
hback-porch = <0x00>;
|
|
vback-porch = <0x00>;
|
|
hfront-porch = <0x00>;
|
|
vfront-porch = <0x00>;
|
|
hsync-len = <0x00>;
|
|
vsync-len = <0x00>;
|
|
clock-frequency = "", "#(";
|
|
};
|
|
};
|
|
};
|
|
|
|
i2c@78ba000 {
|
|
compatible = "qcom,i2c-qup-v2.2.1";
|
|
reg = <0x78ba000 0x500>;
|
|
interrupts = <0x00 0x64 0x04>;
|
|
clocks = <0x14 0x54 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0e 0x46 0x0f>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x63>;
|
|
pinctrl-1 = <0x64>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
spi@78ba000 {
|
|
compatible = "qcom,spi-qup-v2.2.1";
|
|
reg = <0x78ba000 0x500>;
|
|
interrupts = <0x00 0x64 0x04>;
|
|
clocks = <0x14 0x55 0x14 0x3a>;
|
|
clock-names = "core", "iface";
|
|
dmas = <0x46 0x0e 0x46 0x0f>;
|
|
dma-names = "tx", "rx";
|
|
pinctrl-names = "default", "sleep";
|
|
pinctrl-0 = <0x65>;
|
|
pinctrl-1 = <0x66>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x00>;
|
|
status = "disabled";
|
|
};
|
|
|
|
usb@78d9000 {
|
|
compatible = "qcom,ci-hdrc";
|
|
reg = <0x78d9000 0x200 0x78d9200 0x200>;
|
|
interrupts = <0x00 0x86 0x04 0x00 0x8c 0x04>;
|
|
clocks = <0x14 0x8d 0x14 0x8f>;
|
|
clock-names = "iface", "core";
|
|
assigned-clocks = <0x14 0x8f>;
|
|
assigned-clock-rates = <0x4c4b400>;
|
|
resets = <0x14 0x27>;
|
|
reset-names = "core";
|
|
phy_type = "ulpi";
|
|
dr_mode = "otg";
|
|
hnp-disable;
|
|
srp-disable;
|
|
adp-disable;
|
|
ahb-burst-config = <0x00>;
|
|
phy-names = "usb-phy";
|
|
phys = <0x67>;
|
|
status = "okay";
|
|
#reset-cells = <0x01>;
|
|
extcon = <0x2a>;
|
|
|
|
ulpi {
|
|
|
|
phy {
|
|
compatible = "qcom,usb-hs-phy-msm8909", "qcom,usb-hs-phy";
|
|
#phy-cells = <0x00>;
|
|
clocks = <0x18 0x14 0x8c>;
|
|
clock-names = "ref", "sleep";
|
|
resets = <0x14 0x21 0x14 0x26>;
|
|
reset-names = "phy", "por";
|
|
qcom,init-seq = [00 73];
|
|
v1p8-supply = <0x30>;
|
|
v3p3-supply = <0x68>;
|
|
extcon = <0x2a>;
|
|
phandle = <0x67>;
|
|
};
|
|
};
|
|
};
|
|
|
|
remoteproc@a21b000 {
|
|
compatible = "qcom,pronto-v3-pil", "qcom,pronto";
|
|
reg = <0xa204000 0x2000 0xa202000 0x1000 0xa21b000 0x3000>;
|
|
reg-names = "ccu", "dxe", "pmu";
|
|
memory-region = <0x69>;
|
|
interrupts-extended = <0x01 0x00 0x95 0x01 0x6a 0x00 0x01 0x6a 0x01 0x01 0x6a 0x02 0x01 0x6a 0x03 0x01>;
|
|
interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack";
|
|
power-domains = <0x04 0x00 0x04 0x03>;
|
|
power-domain-names = "cx", "mx";
|
|
qcom,smem-states = <0x6b 0x00>;
|
|
qcom,smem-state-names = "stop";
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <0x6c>;
|
|
status = "okay";
|
|
vddpx-supply = <0x30>;
|
|
phandle = <0x70>;
|
|
|
|
iris {
|
|
clocks = <0x6d 0x10>;
|
|
clock-names = "xo";
|
|
vddxo-supply = <0x30>;
|
|
vddrfa-supply = <0x6e>;
|
|
vddpa-supply = <0x6f>;
|
|
vdddig-supply = <0x3d>;
|
|
compatible = "qcom,wcn3620";
|
|
};
|
|
|
|
smd-edge {
|
|
interrupts = <0x00 0x8e 0x01>;
|
|
qcom,ipc = <0x03 0x08 0x11>;
|
|
qcom,smd-edge = <0x06>;
|
|
qcom,remote-pid = <0x04>;
|
|
label = "pronto";
|
|
|
|
wcnss {
|
|
compatible = "qcom,wcnss";
|
|
qcom,smd-channels = "WCNSS_CTRL";
|
|
qcom,mmio = <0x70>;
|
|
|
|
bluetooth {
|
|
compatible = "qcom,wcnss-bt";
|
|
};
|
|
|
|
wifi {
|
|
compatible = "qcom,wcnss-wlan";
|
|
interrupts = <0x00 0x91 0x04 0x00 0x92 0x04>;
|
|
interrupt-names = "tx", "rx";
|
|
qcom,smem-states = <0x34 0x0a 0x34 0x09>;
|
|
qcom,smem-state-names = "tx-enable", "tx-rings-empty";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
interrupt-controller@b000000 {
|
|
compatible = "qcom,msm-qgic2";
|
|
reg = <0xb000000 0x1000 0xb002000 0x1000>;
|
|
interrupt-controller;
|
|
#interrupt-cells = <0x03>;
|
|
phandle = <0x01>;
|
|
};
|
|
|
|
mailbox@b011000 {
|
|
compatible = "qcom,msm8916-apcs-kpss-global", "syscon";
|
|
reg = <0xb011000 0x1000>;
|
|
#mbox-cells = <0x01>;
|
|
clocks = <0x71 0x14 0x01>;
|
|
clock-names = "pll", "aux";
|
|
#clock-cells = <0x00>;
|
|
phandle = <0x03>;
|
|
};
|
|
|
|
clock@b016000 {
|
|
compatible = "qcom,msm8916-a53pll";
|
|
reg = <0xb016000 0x40>;
|
|
#clock-cells = <0x00>;
|
|
clocks = <0x18>;
|
|
clock-names = "xo";
|
|
operating-points-v2 = <0x72>;
|
|
phandle = <0x71>;
|
|
|
|
opp-table {
|
|
compatible = "operating-points-v2";
|
|
phandle = <0x72>;
|
|
|
|
opp-998400000 {
|
|
opp-hz = <0x00 0x3b826000>;
|
|
};
|
|
|
|
opp-1094400000 {
|
|
opp-hz = <0x00 0x413b3800>;
|
|
};
|
|
|
|
opp-1190400000 {
|
|
opp-hz = <0x00 0x46f41000>;
|
|
};
|
|
|
|
opp-1248000000 {
|
|
opp-hz = <0x00 0x4a62f800>;
|
|
};
|
|
|
|
opp-1267200000 {
|
|
opp-hz = <0x00 0x4b87f000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
timer@b020000 {
|
|
compatible = "arm,armv7-timer-mem";
|
|
reg = <0xb020000 0x1000>;
|
|
#address-cells = <0x01>;
|
|
#size-cells = <0x01>;
|
|
ranges;
|
|
|
|
frame@b021000 {
|
|
reg = <0xb021000 0x1000 0xb022000 0x1000>;
|
|
interrupts = <0x00 0x08 0x04 0x00 0x07 0x04>;
|
|
frame-number = <0x00>;
|
|
};
|
|
|
|
frame@b023000 {
|
|
reg = <0xb023000 0x1000>;
|
|
interrupts = <0x00 0x09 0x04>;
|
|
frame-number = <0x01>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frame@b024000 {
|
|
reg = <0xb024000 0x1000>;
|
|
interrupts = <0x00 0x0a 0x04>;
|
|
frame-number = <0x02>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frame@b025000 {
|
|
reg = <0xb025000 0x1000>;
|
|
interrupts = <0x00 0x0b 0x04>;
|
|
frame-number = <0x03>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frame@b026000 {
|
|
reg = <0xb026000 0x1000>;
|
|
interrupts = <0x00 0x0c 0x04>;
|
|
frame-number = <0x04>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frame@b027000 {
|
|
reg = <0xb027000 0x1000>;
|
|
interrupts = <0x00 0x0d 0x04>;
|
|
frame-number = <0x05>;
|
|
status = "disabled";
|
|
};
|
|
|
|
frame@b028000 {
|
|
reg = <0xb028000 0x1000>;
|
|
interrupts = <0x00 0x0e 0x04>;
|
|
frame-number = <0x06>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
power-manager@b088000 {
|
|
compatible = "qcom,msm8909-acc";
|
|
reg = <0xb088000 0x1000>;
|
|
phandle = <0x07>;
|
|
};
|
|
|
|
power-manager@b089000 {
|
|
compatible = "qcom,msm8909-saw2-v3.0-cpu", "qcom,saw2";
|
|
reg = <0xb089000 0x1000>;
|
|
phandle = <0x08>;
|
|
};
|
|
|
|
power-manager@b098000 {
|
|
compatible = "qcom,msm8909-acc";
|
|
reg = <0xb098000 0x1000>;
|
|
phandle = <0x09>;
|
|
};
|
|
|
|
power-manager@b099000 {
|
|
compatible = "qcom,msm8909-saw2-v3.0-cpu", "qcom,saw2";
|
|
reg = <0xb099000 0x1000>;
|
|
phandle = <0x0a>;
|
|
};
|
|
|
|
power-manager@b0a8000 {
|
|
compatible = "qcom,msm8909-acc";
|
|
reg = <0xb0a8000 0x1000>;
|
|
phandle = <0x0b>;
|
|
};
|
|
|
|
power-manager@b0a9000 {
|
|
compatible = "qcom,msm8909-saw2-v3.0-cpu", "qcom,saw2";
|
|
reg = <0xb0a9000 0x1000>;
|
|
phandle = <0x0c>;
|
|
};
|
|
|
|
power-manager@b0b8000 {
|
|
compatible = "qcom,msm8909-acc";
|
|
reg = <0xb0b8000 0x1000>;
|
|
phandle = <0x0d>;
|
|
};
|
|
|
|
power-manager@b0b9000 {
|
|
compatible = "qcom,msm8909-saw2-v3.0-cpu", "qcom,saw2";
|
|
reg = <0xb0b9000 0x1000>;
|
|
phandle = <0x0e>;
|
|
};
|
|
};
|
|
|
|
thermal-zones {
|
|
|
|
cpu0-2-thermal {
|
|
polling-delay-passive = <0xfa>;
|
|
polling-delay = <0x00>;
|
|
thermal-sensors = <0x73 0x03>;
|
|
|
|
trips {
|
|
|
|
trip-point0 {
|
|
temperature = <0x14c08>;
|
|
hysteresis = <0x7d0>;
|
|
type = "passive";
|
|
phandle = <0x74>;
|
|
};
|
|
|
|
cpu_crit {
|
|
temperature = <0x186a0>;
|
|
hysteresis = <0x7d0>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
|
|
map0 {
|
|
trip = <0x74>;
|
|
cooling-device = <0x75 0xffffffff 0xffffffff 0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff>;
|
|
};
|
|
};
|
|
};
|
|
|
|
cpu1-3-thermal {
|
|
polling-delay-passive = <0xfa>;
|
|
polling-delay = <0x00>;
|
|
thermal-sensors = <0x73 0x04>;
|
|
|
|
trips {
|
|
|
|
trip-point0 {
|
|
temperature = <0x14c08>;
|
|
hysteresis = <0x7d0>;
|
|
type = "passive";
|
|
phandle = <0x79>;
|
|
};
|
|
|
|
cpu_crit {
|
|
temperature = <0x186a0>;
|
|
hysteresis = <0x7d0>;
|
|
type = "critical";
|
|
};
|
|
};
|
|
|
|
cooling-maps {
|
|
|
|
map0 {
|
|
trip = <0x79>;
|
|
cooling-device = <0x75 0xffffffff 0xffffffff 0x76 0xffffffff 0xffffffff 0x77 0xffffffff 0xffffffff 0x78 0xffffffff 0xffffffff>;
|
|
};
|
|
};
|
|
};
|
|
|
|
gpu-thermal {
|
|
polling-delay-passive = <0xfa>;
|
|
polling-delay = <0x00>;
|
|
thermal-sensors = <0x73 0x02>;
|
|
|
|
trips {
|
|
|
|
trip-point0 {
|
|
temperature = <0x15f90>;
|
|
hysteresis = <0x7d0>;
|
|
type = "hot";
|
|
};
|
|
};
|
|
};
|
|
|
|
camera-thermal {
|
|
polling-delay-passive = <0xfa>;
|
|
polling-delay = <0x00>;
|
|
thermal-sensors = <0x73 0x01>;
|
|
|
|
trips {
|
|
|
|
trip-point0 {
|
|
temperature = <0x14c08>;
|
|
hysteresis = <0x7d0>;
|
|
type = "hot";
|
|
};
|
|
};
|
|
};
|
|
|
|
modem-thermal {
|
|
polling-delay-passive = <0xfa>;
|
|
polling-delay = <0x00>;
|
|
thermal-sensors = <0x73 0x00>;
|
|
|
|
trips {
|
|
|
|
trip-point0 {
|
|
temperature = <0x14c08>;
|
|
hysteresis = <0x7d0>;
|
|
type = "hot";
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
timer {
|
|
compatible = "arm,armv7-timer";
|
|
interrupts = <0x01 0x02 0xf08 0x01 0x03 0xf08 0x01 0x04 0xf08 0x01 0x01 0xf08>;
|
|
};
|
|
|
|
backlight {
|
|
compatible = "pwm-backlight";
|
|
pwms = <0x7a 0x00 0x186a0>;
|
|
brightness-levels = <0x00 0x04 0x08 0x10 0x20 0x40 0x80 0xff>;
|
|
num-interpolated-steps = <0x02>;
|
|
default-brightness-level = <0x0a>;
|
|
phandle = <0x5f>;
|
|
};
|
|
|
|
battery {
|
|
compatible = "simple-battery";
|
|
voltage-min-design-microvolt = <0x33e140>;
|
|
voltage-max-design-microvolt = <0x401640>;
|
|
energy-full-design-microwatt-hours = <0x56f9a0>;
|
|
charge-full-design-microamp-hours = <0x16e360>;
|
|
ocv-capacity-celsius = <0x19>;
|
|
ocv-capacity-table-0 = <0x3fdf90 0x64 0x3ee590 0x5f 0x3e39b0 0x5a 0x3d89e8 0x55 0x3cc2b0 0x50 0x3c64f0 0x4b 0x3befc0 0x46 0x3b7e78 0x41 0x3afd90 0x3c 0x3a74d8 0x37 0x3a1b00 0x32 0x39e068 0x2d 0x39b570 0x28 0x399a18 0x23 0x3982a8 0x1e 0x3957b0 0x19 0x391160 0x14 0x38bb70 0x10 0x386580 0x0d 0x384a28 0x0b 0x384640 0x0a 0x384258 0x09 0x383a88 0x08 0x382ed0 0x07 0x3807c0 0x06 0x379678 0x05 0x36dee0 0x04 0x35e4e0 0x03 0x349cc0 0x02 0x329538 0x01 0x2dc6c0 0x00>;
|
|
phandle = <0x29>;
|
|
};
|
|
|
|
gpio-keys {
|
|
compatible = "gpio-keys";
|
|
pinctrl-0 = <0x7b>;
|
|
pinctrl-names = "default";
|
|
|
|
key-star {
|
|
wakeup-source;
|
|
gpios = <0x27 0x5a 0x01>;
|
|
linux,code = <0x20a>;
|
|
debounce-interval = <0x0f>;
|
|
linux,can-disable;
|
|
};
|
|
};
|
|
|
|
keypad {
|
|
status = "okay";
|
|
compatible = "gpio-matrix-keypad";
|
|
col-scan-delay-us = <0x07>;
|
|
debounce-delay-ms = <0x0a>;
|
|
gpio-activelow;
|
|
pinctrl-0 = <0x7c 0x7d>;
|
|
pinctrl-names = "default";
|
|
row-gpios = <0x27 0x61 0x01 0x27 0x60 0x01 0x27 0x5f 0x01 0x27 0x5e 0x01>;
|
|
col-gpios = <0x27 0x00 0x01 0x27 0x03 0x01 0x27 0x07 0x01 0x27 0x63 0x01 0x27 0x06 0x01 0x27 0x01 0x01>;
|
|
linux,keymap = <0x1bd 0x10002 0x20005 0x30008 0x4020a 0x5008b 0x10002b8 0x1010003 0x1020006 0x1030009 0x104000b 0x105000e 0x2000069 0x2010004 0x2020007 0x203000a 0x204020b 0x20501be 0x300001c 0x30102b9 0x302006a 0x3030067 0x304006c>;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
pinctrl-0 = <0x7e>;
|
|
pinctrl-names = "default";
|
|
|
|
led-0 {
|
|
function = "kbd_backlight";
|
|
color = <0x00>;
|
|
gpios = <0x2c 0x01 0x00>;
|
|
};
|
|
};
|
|
};
|