36 lines
1.2 KiB
C
36 lines
1.2 KiB
C
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diff --git a/sys/dev/bhnd/bhndb/bhndb_pci.c b/sys/dev/bhnd/bhndb/bhndb_pci.c
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index 0cdcba1d..7b6ae0f3 100644
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--- a/sys/dev/bhnd/bhndb/bhndb_pci.c
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+++ b/sys/dev/bhnd/bhndb/bhndb_pci.c
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@@ -195,6 +195,16 @@ static struct bhndb_pci_quirk bhndb_pci_quirks[] = {
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static struct bhndb_pci_quirk bhndb_pcie_quirks[] = {
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/* All PCIe-G1 core revisions require the SRSH work-around */
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BHNDB_PCI_QUIRK(HWREV_ANY, BHNDB_PCI_QUIRK_SRSH_WAR),
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+
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+ /*
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+ * BCM43224 (and other Broadcom PCIe-G1 endpoints) do not have MSI
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+ * delivered on some host platforms (e.g. NVIDIA MCP89 based Apple
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+ * MacBook Air); force legacy INTx instead.
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+ */
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+ { { BHND_MATCH_CHIP_ID(BCM43224) },
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+ { BHND_MATCH_ANY },
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+ BHNDB_PCI_QUIRK_NO_MSI },
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+
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BHNDB_PCI_QUIRK_END
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};
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@@ -327,6 +337,13 @@ bhndb_pci_alloc_msi(struct bhndb_pci_softc *sc, int *msi_count)
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{
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int error, count;
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+ /* MSI disabled by bridge quirk? */
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+ if (sc->pci_quirks & BHNDB_PCI_QUIRK_NO_MSI) {
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+ device_printf(sc->dev, "MSI disabled by quirk; using INTx on "
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+ "%s\n", device_get_nameunit(sc->parent));
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+ return (ENXIO);
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+ }
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+
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/* Is MSI available? */
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if (pci_msi_count(sc->parent) < BHNDB_PCI_MSI_COUNT)
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return (ENXIO);
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