5 Commits

Include renames

Author	SHA1	Message	Date
Luxferre	c4af5dec42	implemented spec change: now cell 127 always return 1	2025-04-30 11:04:43 +03:00
Luxferre	4df14f49f5	added I/O port 2 support for the TI-74 implementation	2025-04-27 18:53:07 +03:00
Luxferre	08c3c869c5	made sure DMEM[0] is always 0 in the ti-74 port	2025-04-27 18:42:30 +03:00
Luxferre	eeb68ff8e6	adjusted jumps in the ti-74 port	2025-04-27 18:36:48 +03:00
Luxferre	192656fef8	added the TI-74 BASIC port and the mu808asm'MU74 export support	2025-04-27 16:53:48 +03:00